Managing multi-component data

ABSTRACT

Multi-component data is managed. Pixel image data is stored in a machine readable memory device. The pixel image data is decomposed into multiple colorspace components. The multiple colorspace components are stored in one continuous machine-readable memory segment of a machine-readable memory. The machine-readable memory has one or more burst boundaries.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application claims the benefit of and priority to U.S.provisional application Ser. No. 60/431,407, filed Dec. 6, 2002,entitled “Method For Improving Memory Read Efficiency and ArithmeticCoding Speed,” the entire disclosure of which is herein incorporated byreference.

TECHNICAL FIELD

The invention relates to managing multi-component data. In particular,an aspect of the invention relates to storing multiple colorspacecomponents of a pixel image in a single memory segment.

BACKGROUND OF THE INVENTION

Video decoders include a function commonly referred to as “motioncompensation.” This function is necessary to allow the decoder toprocess numerous different video compression standards, including butnot necessarily limited to: MPEG-1, MPEG-2, MPEG-4, H.263, H.264, andH.261. More specifically, motion compensation includes a process ofcopying a two-dimensional block of image data from a previously decodedreference frame to the frame currently being decoded. The location ofthe reference block relative to the current position in the currentframe is specified by “motion vectors” included within the input codestream. Motion compensation allows for a compact specification of thedata whenever the video stream is well modeled by translational motion.

Typically, reference frames that are used for motion compensation arestored in a relatively large memory (typically DRAM). To improve generalperformance, DRAMs are generally accessed in bursts of data (usually 2,4, 8, or 16 data words in a burst). Accesses within a single burst arehighly efficient (1 word per clock cycle with single data rate (SDR)DRAM, 2 words per clock cycle with double data rate (DDR) DRAM).

In cases where the memory data interface is 32 bits wide (word size of 4bytes) and the burst size is 2 words, then each burst accesses 8 bytes(2 words×4 bytes per word). However, bursts can only access data alignedto burst boundaries, and therefore a burst of N words must be aligned toan address integrally divisible by N.

Furthermore, additional memory read inefficiencies are introduced wheneach pixel contains multiple components of an image and, as in motioncompensation, it is necessary to retrieve the data for all of the imagecomponents to use the data. This further increases the number of burstsnecessary to read a particular set of data.

SUMMARY OF THE INVENTION

In general, the invention relates to managing multi-component data,e.g., data with multiple colorspace components. Aspects of the inventionrelate to reducing the number of bursts needed to read multiplecolorspace components of a pixel image.

In at least one aspect, invention relates to a method of storing data.Pixel image data is stored in a machine-readable memory. Pixel imagedata is decomposed into multiple colorspace components, which are thenstored in one continuous machine-readable memory segment in amachine-readable memory, where the machine readable memory has one ormore burst boundaries.

The machine readable memory can be volatile memory such as DRAM or SRAM.In one embodiment, the colorspace components are luminance, reddifference sample, and blue difference sample. In another embodiment,the colorspace components are red color level, green color level, andblue color level. In yet another embodiment, the pixel image dataincludes a first data byte that is registered at a memory addressimmediately following a burst boundary. In another embodiment, the pixelimage data includes a first data byte and subsequent data bytes, and oneof the subsequent data bytes is registered at a memory addressimmediately following a burst boundary.

In at least one aspect of the invention, pixel image data is retrievedfrom a machine-readable memory. Pixel image data is retrieved from amachine readable memory device having one or more burst boundaries. Thepixel image data comprises multiple colorspace components and waspreviously stored in the machine readable memory device in onecontinuous memory segment.

While particularly useful in the field of encoded video data, thesemethods are not limited to that specific application, and can be used insimilar applications where video data is stored in and read from memorydevices.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings, like reference characters generally refer to the sameelements throughout the different views. In addition, the drawings arenot necessarily to scale, emphasis instead generally being placed uponillustrating the principles of the invention.

FIG. 1 illustrates storing different colorspace components in differentmemory segments.

FIG. 2 illustrates storing different colorspace components in differentmemory segments.

FIG. 3 illustrates storing different colorspace components in one memorysegment in accordance with the invention.

FIG. 4 illustrates storing different colorspace components in one memorysegment in accordance with the invention.

DETAILED DESCRIPTION

Image pixel data can be comprised of multiple components. For example,YUV colorspace is comprised of three components, luminance, whichrepresents the brightness level and is abbreviated as Y, the RedDifference sample abbreviated as U, and the Blue Difference sampleabbreviated as V. Previous methods for storing the values for YUVcolorspace stored each component in a separate memory space.

FIG. 1 illustrates an example embodiment in which multi-component pixelimage data is stored in multiple memory segments. Three memory segments,105 a, 105 b, and 105 c are allocated to store the image pixel data 110.One component of the data 110 is allocated to each memory segment—the Ycomponent is allocated to segment 1 105 a, the U component is allocatedto segment 2 105 b, and the V component is allocated to segment 3, 105c. Furthermore, the memory segments are constrained by burst boundaries115 defining the bytes of data read during each clock cycle.

Where each component (the Y0, U0 and V0 components) is stored in such amanner that they are registered at the first memory address following aburst boundary, the number of bursts needed to read the entire data setis 3—one burst for each segment. The efficiency of accessing data inthis manner is 100%—i.e., 24 total bytes are needed and 24 bytes areread.

FIG. 2, however, illustrates an example embodiment in which the firstbyte of each component (the Y0, U0 and V0 components) are stored at amemory address other than the first memory address following a burstboundary. In such cases, the read efficiency is reduced to 50%—6 burstsof 8 bytes each (48) to retrieve 24 bytes of desired data. Whendesigning systems to that access image pixel data, the worst caseefficiency must be accounted for, and therefore the speed at which thedata can be read from memory is compromised.

FIG. 3 illustrates one possible embodiment of the invention, where themultiple YUV components of pixel image data are stored in one continuousmemory segment. The entire set of pixel components 110 is stored in onememory segment 105 a. Furthermore, the memory segment 105 a has fourburst boundaries 115. Each burst boundary 115 defines a set of memoryaddresses that are read for each burst. Where the first byte of data(Y0) is registered at the first data address following a burst boundary,three bursts are needed to read the 24 bytes of data 110. This alignmentproduces a 100% read efficiency, because 24 bytes of data are read toretrieve the 24 desired bytes.

When the three pixel components 110 are stored in one memory segment 105a, the worst case efficiency is increased. Referring to FIG. 4, thefirst byte of data (Y0) is stored at a memory address other than oneimmediately following a burst boundary. Therefore, to read all 24 bytesof data 110, four bursts are needed, resulting in a read efficiency of75% (8 bytes per burst multiplied by 4 bursts equals 32 bytes read toretrieve 24 desired bytes of data). This represents a 50% increase (75%compared to 50%) in read efficiency over the previous methods describedabove.

In some embodiments using the YUV colorspace components, the Y component(luminance) is sampled twice as often as the color samples, U and V,such that every 2 pixels share the same color values. Referring to FIG.5, 16 bytes of data 110 are stored in one memory segment 105 a.Furthermore, and illustrating the 2:1 luminance to color sampling rate,two Y components are stored for each set of two color components—i.e.the U0 and V0 color components are used for both the Y0 and Y1 luminancecomponent. In this instance, the read efficiency is 67% (3 bursts of 8bytes each to retrieve 16 desired bytes of data). This represents a 34%increase (67% compared to 50%) in read efficiency over the previousmethods described above.

The methods described above may be implemented using one or more dataprocessing devices. In some embodiments, the data processing devices mayimplement the functionality of the present invention in hardware, using,for example, a computer chip. The data processing device may receivesignals in analog or digital form. In other embodiments, the dataprocessing device may implement the functionality of the presentinvention as software on a general purpose computer, video displaydevice, or other electronic device. In such an embodiment, the programmay be written in any one of a number of programming languages, such asFORTRAN, PASCAL, C, C++, C#, Tcl, or BASIC. Further, the program can bewritten in a script, macro, or functionality embedded in commerciallyavailable software, such as EXCEL or VISUAL BASIC.

Additionally, the software could be implemented in an assembly languagedirected to a microprocessor resident on a video display device,computer or other electronic device. For example, the software can beimplemented in Intel 80×86 assembly language if it is configured to runon an IBM PC or PC clone. The software may be embedded on an article ofmanufacture including, but not limited to, “machine-readable programmeans” such as a floppy disk, a hard disk, an optical disk, a magnetictape, a PROM, an EPROM, ROM, or CD-ROM.

Variations, modifications, and other implementations of what isdescribed herein will occur to those of ordinary skill in the artwithout departing from the spirit and the scope of the invention asclaimed. Accordingly, the invention is to be defined not by thepreceding illustrative description but instead by the spirit and scopeof the following claims.

1-24. (canceled)
 25. A processing device for managing pixel image datain a plurality of memory bursts, the processing device comprising: afirst circuit for retrieving and storing the pixel image data comprisinga plurality of colorspace components, wherein each colorspace componentis one of three different types, and wherein one type of colorspacecomponent is stored in each memory burst; and a second circuit forcopying the plurality of colorspace components from the memory bursts.26. The processing device of claim 25, wherein the plurality of memorybursts are in volatile memory.
 27. The processing device of claim 26,wherein the volatile memory comprises dynamic random access memory. 28.The processing device of claim 26, wherein the volatile memory comprisesstatic random access memory.
 29. The processing device of claim 25,wherein the colorspace components comprise luminance, red differencesample, and blue difference sample.
 30. The processing device of claim25, wherein the colorspace components comprise a red color level, agreen color level, and a blue color level.
 31. The processing device ofclaim 25, wherein the pixel image data comprises a first data byte, thefirst data byte being registered at a memory address immediatelyfollowing a boundary of a memory burst in the plurality of memorybursts.
 32. The processing device of claim 25, wherein the pixel imagedata comprises a first data byte and subsequent data bytes, one of thesubsequent data bytes being registered at a memory address immediatelyfollowing a boundary of a memory burst in the plurality of memorybursts.
 33. A video processor comprising: an input circuit for receivinga plurality of colorspace components, wherein each colorspace componentis one of three different types; a memory for storing the plurality ofcolorspace components in one continuous segment, wherein the memorycomprises a plurality of bursts and one or more burst boundaries, andwherein one type of colorspace component is stored in each burst; and anoutput circuit for transferring the plurality of colorspace componentsfrom the memory.
 34. The video processor of claim 33, wherein the memorycomprises volatile memory.
 35. The video processor of claim 34, whereinthe volatile memory comprises dynamic random access memory.
 36. Thevideo processor of claim 34, wherein the volatile memory comprisesstatic random access memory.
 37. The video processor of claim 33,wherein the colorspace components comprise luminance, red differencesample, and blue difference sample.
 38. The video processor of claim 33,wherein the colorspace components comprise a red color level, a greencolor level, and a blue color level.
 39. A video processing systemcomprising: a microprocessor for controlling the reception of aplurality of colorspace components, each colorspace component in theplurality of colorspace components is one of three different types; anda memory for storing the plurality of colorspace components in onecontinuous segment, the memory comprises a plurality of bursts and oneor more burst boundaries, each burst in the plurality of bursts storesone type of colorspace component, wherein the microprocessor controlsthe transfer of the plurality of colorspace components from the memory.40. The video processing system of claim 39, wherein the memorycomprises volatile memory.
 41. The video processing system of claim 40,wherein the volatile memory comprises dynamic random access memory. 42.The video processing system of claim 40, wherein the volatile memorycomprises static random access memory.
 43. The video processing systemof claim 39, wherein the colorspace components comprise luminance, reddifference sample, and blue difference sample.
 44. The video processingsystem of claim 39, wherein the colorspace components comprise a redcolor level, a green color level, and a blue color level.